Design of Low Power & High Performance

Clock distribution networks consume a major portion of the power of a chip . Continuous Scaling of VLSI Technology i.e Channel length ,Supply has lead to integration of millions of transistors on a single chip operating at very high clock frequencies. Besides area and performance, the modern VLSI designs aim at low-power consumption due to limited battery lifetime. Most voltage scaling techniques require that the Integrated Circuit operates at a single supply voltage The design utilizing Dual Vdd and Single Vth provide effective reduction of power. The use of multiple supply voltages (multiVdd) is an effective technique for reducing the power consumption without degrading the speed in an integrated circuit (IC). To transfer signals among the circuits operating at different supply voltages such as Dual Vdd , level converters are required. Three new multi supply voltages (multi-Vdd) level converters are proposed in this paper. The proposed level converters are compared with the level converter. For high performance and Low power design, different types of level converters are analyzed.